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The rapid evolution of Very Large-Scale Integration (VLSI) design, coupled with the challenges in the RTL-to-GDS flow, necessitates efficient solutions. This paper introduces the integration of machine learning (ML) into VLSI design, specifically focusing on the Automated RTL-to-GDS Flow Optimization. As technology nodes shrink, manual optimization becomes impractical, making ML a groundbreaking solution. The paper explores the phases of supervised and unsupervised machine learning, emphasizing their roles in fortifying hardware security. Furthermore, it provides an overview of ML models, feature selection, and dimensionality reduction techniques, showcasing their collective impact on optimizing the RTL-to-GDS flow in VLSI design.

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Automated RTL-To-GDS Flow Optimization Through Machine Learning in VLSI Design

  • 会议论文

  • 发表日期：

    2025年

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  • Renuka Kuntala,
  • K. Venkata Balamurali Krishna,
  • Peddi Niranjan Reddy,
  • Mruthyunjayam Allakonda,
  • Gujjula Anjareddy,
  • Bimmarolu Shanthi

摘要

The rapid evolution of Very Large-Scale Integration (VLSI) design, coupled with the challenges in the RTL-to-GDS flow, necessitates efficient solutions. This paper introduces the integration of machine learning (ML) into VLSI design, specifically focusing on the Automated RTL-to-GDS Flow Optimization. As technology nodes shrink, manual optimization becomes impractical, making ML a groundbreaking solution. The paper explores the phases of supervised and unsupervised machine learning, emphasizing their roles in fortifying hardware security. Furthermore, it provides an overview of ML models, feature selection, and dimensionality reduction techniques, showcasing their collective impact on optimizing the RTL-to-GDS flow in VLSI design.