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To reduce the power consumption in the twisted-ring counter using power gating technique. Power gating is a technique used in integrated circuit design to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use. Dynamic power is dissipated when the circuit is active. Occurs when the MOS transistor switches to charge and discharge the output load capacitance at a particular node at operating frequency. Short circuit power dissipation is due to the switching of transistors. There will be a period when some of the transistors in the pull-up and pull-down networks are switched “ON” at the same time, providing the short circuit from Vdd to GND.

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Power Minimization Twisted Ring Counter Design Using Power Gating Technique

  • 会议论文

  • 发表日期：

    2025年

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  • A. Anjaline Jayapraba,
  • P. Keerthi,
  • T. R. Sree Vidya,
  • S. Hari Ramakrishnan,
  • R. Swathi,
  • S. B. Harshhika,
  • D. Sahaya Abinav

摘要

To reduce the power consumption in the twisted-ring counter using power gating technique. Power gating is a technique used in integrated circuit design to reduce power consumption, by shutting off the current to blocks of the circuit that are not in use. Dynamic power is dissipated when the circuit is active. Occurs when the MOS transistor switches to charge and discharge the output load capacitance at a particular node at operating frequency. Short circuit power dissipation is due to the switching of transistors. There will be a period when some of the transistors in the pull-up and pull-down networks are switched “ON” at the same time, providing the short circuit from Vdd to GND.