This chapter introduces new devices named “SLMLET” based on a shell-rolled chip for Multi-access Edge Computing (MEC). The Shell–Role architecture has a CPU, memory, and general I/O in the Shell section, and a standard interface between the Shell section and the Role section. The Role section can accommodate a variety of applications by including user-defined purpose-specific circuits. The SLMLET has an area-efficient embedded FPGA (eFPGA) in the Role section, making it user-programmable. The eFPGA uses an original logic block architecture named Scalable Logic Cell (SLM), which can be implemented with a small number of configuration memories and a small area. Firstly, we introduce the concept of the SLMLET architecture and the SLM-based eFPGA-IP architecture. Then, we report on three types of prototype chips that were designed and developed in our project.

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New Devices

  • Morihiro Kuga,
  • Masahiro Iida,
  • Hideharu Amano

摘要

This chapter introduces new devices named “SLMLET” based on a shell-rolled chip for Multi-access Edge Computing (MEC). The Shell–Role architecture has a CPU, memory, and general I/O in the Shell section, and a standard interface between the Shell section and the Role section. The Role section can accommodate a variety of applications by including user-defined purpose-specific circuits. The SLMLET has an area-efficient embedded FPGA (eFPGA) in the Role section, making it user-programmable. The eFPGA uses an original logic block architecture named Scalable Logic Cell (SLM), which can be implemented with a small number of configuration memories and a small area. Firstly, we introduce the concept of the SLMLET architecture and the SLM-based eFPGA-IP architecture. Then, we report on three types of prototype chips that were designed and developed in our project.