Low-Power Wide Area Networks (LPWANs) have emerged as crucial for advancing and enhancing the Internet of Things (IoT). These networks enable wireless communication over long distances while maintaining low data rates and minimising power consumption, making them ideal for IoT applications. To ensure the improvement of IoT communication, evaluating the suitability of communication techniques widely used in wireless systems, such as Direct Sequence Spread Spectrum (DSSS), is essential. Hence, this paper presents a performance analysis of the DSSS MODEM, along with digital modulation schemes such as QAM, 8 QAM, 16 QAM, 64 QAM, BPSK, DBPSK, QPSK, 8 PSK, 16 PSK, and MSK by using Additive White Gaussian Noise (AWGN) Channel. Among these, the DSSS-BPSK MODEM is selected due to its superior performance in terms of bit error rate (BER) versus signal-to-noise ratio (SNR) and design complexity. The design of the DSSS-BPSK MODEM architecture is implemented using Verilog Hardware Description Language (Verilog HDL) and prototyped on a commercially available Field Programmable Gate Array (FPGA). BER performance is measured against the SNR ranging from − 40 to 5 dB, which shows that DSSS-BPSK performs better than a BPSK scheme and is thus suitable for wireless edge devices employed for IoT applications.