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This paper presents the design and layout simulation of a two stage CMOS Op-amp by using 45 nm technology. The circuit can function effectively in a closed-loop feedback system when it has a high gain. Using a PTM 45 nm CMOS technology, the circuit was constructed. The parameters performance like phase margin, gain margin, slew rate, ICMR, UGB, CMRR, Offset, output swing, etc., have been analyzed after simulation which is carried out by using Cadence Virtuous tool. With a capacitive load of 2 pF and a resistive load of 1000 kΩ, the phase margin is 60° and the unity gain bandwidth (UGB) is 30 MHZ. To maximize changes in gain and bandwidth for high-speed applications, a compensating capacitor is connected across a high gain stage using the RC Miller compensation approach. The designed op-amp gives a DC gain of 60 dB and a unity gain bandwidth of 30 MHZ at 2Pf. This circuit is well-suited for high-speed applications due to its high bandwidth and high gain, which allow it to function efficiently in closed-loop feedback systems. Slew rate is found to be 18.25 V/µs.

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Low Power Two Stage CMOS OP-AMP Design in 45 nm Technology Node

  • 会议论文

  • 发表日期：

    2025年

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  • Aribam Balarampyari Devi,
  • L. Kholee Phimu,
  • Kh Jolson Singh,
  • Jogendra Haobam,
  • Dickson Warepam

摘要

This paper presents the design and layout simulation of a two stage CMOS Op-amp by using 45 nm technology. The circuit can function effectively in a closed-loop feedback system when it has a high gain. Using a PTM 45 nm CMOS technology, the circuit was constructed. The parameters performance like phase margin, gain margin, slew rate, ICMR, UGB, CMRR, Offset, output swing, etc., have been analyzed after simulation which is carried out by using Cadence Virtuous tool. With a capacitive load of 2 pF and a resistive load of 1000 kΩ, the phase margin is 60° and the unity gain bandwidth (UGB) is 30 MHZ. To maximize changes in gain and bandwidth for high-speed applications, a compensating capacitor is connected across a high gain stage using the RC Miller compensation approach. The designed op-amp gives a DC gain of 60 dB and a unity gain bandwidth of 30 MHZ at 2Pf. This circuit is well-suited for high-speed applications due to its high bandwidth and high gain, which allow it to function efficiently in closed-loop feedback systems. Slew rate is found to be 18.25 V/µs.