With the swift progress of deep neural networks and large-scale models, the demands for the computational performance of hardware are escalating at an accelerated pace. As a result, the Computing In Memory chip has emerged as an innovative architectural solution. Nevertheless, the efficient coordination of the Computing In Memory chip arrays has emerged as a critical factor that restricts the further enhancement of its performance. In this paper, we zero in on the approach of generating the optimal order based on the artificial bee colony algorithm and the Top-Left scheduling logic algorithm. To address the issue of the slower speed of the artificial bee colony algorithm, we have ingeniously designed a rapid and highly accurate pointer network. Through meticulous experimental verification, the proposed pointer network not only significantly boosts the computation speed but also maintains an elevated level of accuracy.