An algorithm for color correction is essential for processing colour data. In colour correction algorithms, the range of statistical techniques continues to expand to achieve higher accuracy and reproducibility across various applications. One of the methods that is most frequently applied in practice is polynomial color correction. However, timing performance is significantly impacted by the computationally demanding and time-consuming aspect of implementing a sophisticated colour correction technique in Hardware Description Language, particularly for critical diagnostic applications. In order to enhance the temporal performance of repetitive operations in the polynomial algorithm while preserving accuracy with the least degree of deterioration, this study suggests a hardware accelerator. By employing a combination of pipelining, array partitioning, and loop unrolling techniques, a speedup of 22.05 times has been achieved, albeit at the expense of hardware resources. In conclusion, the various approach configurations proposed in this project offer multiple design alternatives, balancing hardware cost and performance to meet diverse usage and performance objectives.