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This research chapter introduces a high-pass filter constructed using a two-stage OTA configuration. The design and simulation were performed using the Cadence Virtuoso tool in the 0.18 μm CMOS process. The operational transconductance amplifier (OTA) utilized a biasing current of 20μA and operated on a supply voltage of ± 1.8 v. Various design structures are discussed in this research article, analysing their respective parameters. Among these structures, the OTA-C, bi-quad configuration was identified as particularly suitable due to its lower power consumption and ease of fabrication.

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Design and Simulation of a High-pass Filter Using a Two-Stage OTA in 0.18 μm CMOS Technology

  • 会议论文

  • 发表日期：

    2025年

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  • Chandrasekhar Aditya,
  • Shivangi Awasthi,
  • Balwinder Singh,
  • Manjit Kaur,
  • Shubhangi Awasthi

摘要

This research chapter introduces a high-pass filter constructed using a two-stage OTA configuration. The design and simulation were performed using the Cadence Virtuoso tool in the 0.18 μm CMOS process. The operational transconductance amplifier (OTA) utilized a biasing current of 20μA and operated on a supply voltage of ± 1.8 v. Various design structures are discussed in this research article, analysing their respective parameters. Among these structures, the OTA-C, bi-quad configuration was identified as particularly suitable due to its lower power consumption and ease of fabrication.