This study proposes a device called the Double-Gate Dual Material Gate Graphene Nanoribbon-Vertical-TFET (DG-DMG-GNR-VTFET) for use in digital inverters and DC performance. This device initially has a P-I-N structure and operates using a band-to-band tunneling conduction mechanism technique. The proposed device uses a two-dimensional material GNR at the channel region because of its low bandgap, high mobility, and high saturation velocity. It is also a dual material gate consisting of auxiliary and tunnel gates. The proposed structure of the Graphene Nanoribbon (GNR)-based channel and the other TFET structure have been compared. At a drain voltage VDS = 0.5 V, compared to silicon-VTFET (36 mV/decade), Graphene Nanoribbon material channel VTFET has a superior average subthreshold swing (SSAVG) of 16 mV/decade. The on-state drain current of the proposed device is 1.764 × 10–4 A/µm, or roughly twice as much as the conventional TFET. The device is also subjected to RF analysis for a variety of FOMs, including transfer characteristics, Miler capacitance, transconductance (gm), and cut-off frequency (fT), with the results being contrasted with those of traditional TFET. It is determined that the device is appropriate for high-frequency and low-power applications. Finally, the performance of these two devices is compared after circuit-level analysis was completed by designing inverter circuits for the suggested structures. Furthermore, the Cadence Virtuoso tool has used a Verilog-A model based on lookup tables for circuit-level analysis.