Low-Power Analysis of a Non-align Double Gate Field Effect Transistor Inverter
摘要
This work explores the design analysis and performance evaluation of inverter circuit using a non-aligned double gate field effect transistor (NADGFET) with 50 nm channel length. Gate oxide material has a significant influence on performance of the inverter device; therefore, the inverter was investigated by changing the gate oxide material of the devices. In this work, two gate oxide material, i.e., silicon dioxide SiO2 (low-k, 3.9), and hafnium dioxide HfO2 (high-k, 24) is taken. Simulation analysis was done by using TCAD Sentaurus sdevice mixed mode. The performance evaluating parameters of the inverter circuit are reported and optimum supply voltage of the inverter was determined. The result shows that at 0.66 V optimum supply the propagation delay of the NADGFET inverter with low-k and high-k material are 6.1 ps and 7.5 ps, respectively. At the optimum supply voltage, the power-delay product are 45.38 aJ and 70.37 aJ for low-k and high-k, respectively, best for low-power application. This work concludes that an inverter using low-k gate oxide material is suitable at high-frequency giving optimal power-delay performance.