Method and Implementation of Airborne Complex Electronic Verification Based on UVM
摘要
This article builds a simulation experimental platform for airborne complex electronic verification projects based on the Universal Verification Methodology (UVM) framework. Provide FPGA communication protocols, including the code implementation of multi-channel data transmission and reception for ARINC429 protocol, as well as the timing construction of SPI bus in ARINC717 protocol communication, and data transmission and reception based on opcode. This article proposes a combination of UVM and FPGA protocol to achieve FPGA verification. The simulation results show that the testing platform proposed in this article has high reusability. Compared to previous directed incentive methods, efficiency is more effective in detecting logical conflicts in design code (DUT).