LTP: A Lightweight On-Chip Temporary Prefetcher for Data-Dependent Memory Accesses
摘要
Data-dependent memory accesses (DDAs) patterns are prevalent in applications like machine learning, graph analysis, and machine learning, and databases. DDAs consist of producer-consumer pairs, where consumers’ memory addresses are derived from producers’ memory data. Due to insufficient spatial locality, traditional spatial prefetching techniques are ineffective for DDAs. Although some previous prefetching methods aimed at enhancing DDAs performance successfully reduce data misses, we observe that there remains substantial room for improvement. Current state-of-the-art hardware prefetchers either (1) incur high overhead to achieve high coverage but with low accuracy, or (2) maintain low overhead and high accuracy but suffer from low coverage. To address these limitations, we propose a novel hardware prefetcher named LTP, the first temporal data prefetcher specifically designed for DDA-intensive workloads to be used in the L1D cache. LTP exploits the relationships between register states across instructions to accurately identify dependency chains, and then selects PCs of high-frequency DDAs to record their address pairs for future prefetch request generation. By only recording DDAs’ metadata, LTP maintains a balance between coverage and accuracy at a low cost. Our evaluation demonstrates that LTP achieves an average speedup of 21% compared to no prefetching, 9% over the traditional spatial prefetcher IPCP, and 24% over the conventional temporal prefetcher Triage, while maintaining 21 times lower storage overhead. Additionally, LTP surpasses previous DDA-specific prefetchers Tyche, by 5%.