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This study addresses the significant issue of image blur through image restoration techniques that reduce or remove blur and detect blurry regions, improving image quality and analysis potential. Utilizing FPGA-based digital hardware systems, the research leverages FPGA-supported systems like ZYNQ and ARM, using the Advanced eXtensible Interface (AXI) and Advanced Microcontroller Bus Architecture (AMBA) for streamlined device communication. The design incorporates specialized Intellectual Property (IP) cores such as Square Root (Sqrt) and Shift RAM, tailored to overcome the limitations of development cycles and processing algorithms, focusing on portability across various platforms including domestic FPGAs. The practical implementation features modules for axis-stream transmission, RGB to YUV conversion, image smoothing using Gaussian, mean, and median filters, advanced image processing with Sobel edge detection, and erosion-dilation modules. A ZYNQ verification system with an OV5640 camera and HDMI output substantiates the functionality and efficiency of the designed IP core, which is further analyzed for resource and power consumption using a High-Level Synthesis (HLS) tool. The study successfully demonstrates a robust IP core for blurry image processing, significantly enhancing the field of image processing and embedded systems, laying a strong groundwork for future advancements and porting endeavors, and highlighting the efficacy of FPGA-based image processing solutions.

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Design of AXI Bus-Based IP Core for Image Processing

  • 会议论文

  • 发表日期：

    2025年

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  • Yutong Chen,
  • Zhongchao Yi,
  • Xuqiang Li,
  • Xingyan Chen,
  • Yanjiang Chen

摘要

This study addresses the significant issue of image blur through image restoration techniques that reduce or remove blur and detect blurry regions, improving image quality and analysis potential. Utilizing FPGA-based digital hardware systems, the research leverages FPGA-supported systems like ZYNQ and ARM, using the Advanced eXtensible Interface (AXI) and Advanced Microcontroller Bus Architecture (AMBA) for streamlined device communication. The design incorporates specialized Intellectual Property (IP) cores such as Square Root (Sqrt) and Shift RAM, tailored to overcome the limitations of development cycles and processing algorithms, focusing on portability across various platforms including domestic FPGAs. The practical implementation features modules for axis-stream transmission, RGB to YUV conversion, image smoothing using Gaussian, mean, and median filters, advanced image processing with Sobel edge detection, and erosion-dilation modules. A ZYNQ verification system with an OV5640 camera and HDMI output substantiates the functionality and efficiency of the designed IP core, which is further analyzed for resource and power consumption using a High-Level Synthesis (HLS) tool. The study successfully demonstrates a robust IP core for blurry image processing, significantly enhancing the field of image processing and embedded systems, laying a strong groundwork for future advancements and porting endeavors, and highlighting the efficacy of FPGA-based image processing solutions.