INF-DRAM: An In-Memory Prefetching DRAM Architecture
摘要
DRAM remains the primary main memory in CPU and GPU systems for its cost-effectiveness, density, and speed. However, prior work has shown that DRAM bandwidth often cannot reach the theoretical maximum in real-world applications, primarily due to row-buffer conflicts. This paper introduces INF-DRAM, a new DRAM architecture that converts unused internal bandwidth into accessible external bandwidth via an in-memory prefetching mechanism. By exploiting the wide internal bandwidth to preload anticipated data into dedicated prefetch buffers, INF-DRAM mitigates row-switching overhead caused by memory interference. Accessing data in the prefetch buffers is not constrained by most standard DRAM operations (e.g., activation, precharge, refresh), as these accesses bypass the physical banks. Simulation results show that INF-DRAM achieves an average 6% performance improvement (up to 21%) and a 1.2% energy efficiency gain on CPU workloads from SPEC 2006/2017, with only 0.159% area overhead. On GPUs, INF-DRAM reduces latency by 32.6% for end-to-end single-token inference on Llama 3.2-1B compared to standard HBM.