As quantum computing poses a significant threat to traditional cryptographic systems, the need for post-quantum cryptographic (PQC) solutions has become urgent. Implementing these lattice-based algorithms on resource-constrained platforms, such as embedded systems and IoT devices, presents challenges. These challenges stem from the high computational and memory demands of the algorithms. Existing hardware designs often focus on accelerating specific computational tasks, like the Number Theoretic Transform (NTT), but are usually tailored to individual algorithms, making them inefficient for multi-algorithm systems. In this work, we address these challenges by designing KiRa: A Unified Memory Architecture for PQC that supports both CRYSTALS-Dilithium and CRYSTALS-Kyber at all NIST security levels. The architecture allows core components, such as Keccak, NTT, and sampling modules, to be shared across both Dilithium and Kyber algorithms. A uniform control logic and dataflow enable seamless switching between the two algorithms without duplicating resources. To support high-throughput polynomial operations, KiRa includes a dual-port memory design that efficiently handles polynomial data, and features a high-throughput NTT engine compatible with both algorithms. We implement and test the design on a Zynq UltraScale+ MPSoC FPGA platform. The results demonstrate a significant reduction in logic usage, memory access frequency, and dynamic power consumption, while improving latency for signing and decryption operations. Our results show that KiRa achieves a 23.8% reduction in area, a 17.3% improvement in latency, and a 72.1% reduction in dynamic power, proving its potential as an efficient and scalable solution for post-quantum cryptographic hardware.