Switching power supplies are widely used in precision testing applications due to their advantages of high efficiency, compact size, and high-power density. However, traditional switching power supplies face significant technical challenges under high-current conditions, such as large output current ripple caused by switching losses and parasitic parameters, which not only degrade power quality and efficiency but may also interfere with the normal operation of sensitive test equipment. To address these issues, the multiple-phase interleaved Buck converter employs a multi-phase parallel and interleaved control strategy, effectively reducing output current ripple while improving dynamic response. However, noise levels and stability still require further optimization. Based on this, this paper proposes an improved three-phase interleaved Buck topology, incorporating an innovative second-order filter circuit and precise consideration of parasitic parameters. Additionally, the effects of topologies with different phase numbers were compared, the key components such as switching transistors and power capacitors are carefully selected. Simulation results demonstrate that the output ripple is reduced to 0.2 mA, achieving a breakthrough in performance.

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Research on Ultra-Low Ripple Switching Power Supply Design Based on Improved Three-Phase Interleaved Parallel Topology

  • Yuan Cheng,
  • Yuewen Zhou,
  • Bochao Du,
  • Jiyuan Wang

摘要

Switching power supplies are widely used in precision testing applications due to their advantages of high efficiency, compact size, and high-power density. However, traditional switching power supplies face significant technical challenges under high-current conditions, such as large output current ripple caused by switching losses and parasitic parameters, which not only degrade power quality and efficiency but may also interfere with the normal operation of sensitive test equipment. To address these issues, the multiple-phase interleaved Buck converter employs a multi-phase parallel and interleaved control strategy, effectively reducing output current ripple while improving dynamic response. However, noise levels and stability still require further optimization. Based on this, this paper proposes an improved three-phase interleaved Buck topology, incorporating an innovative second-order filter circuit and precise consideration of parasitic parameters. Additionally, the effects of topologies with different phase numbers were compared, the key components such as switching transistors and power capacitors are carefully selected. Simulation results demonstrate that the output ripple is reduced to 0.2 mA, achieving a breakthrough in performance.