Timing Parameters and Optimization Scenarios
摘要
In the previous few chapters, we have discussed the combinational and sequential design elements. This chapter is useful to understand the timing parameters, insertion delays, timing paths and the slack calculations. The chapter is also useful to understand the setup and hold slack calculations and various design scenarios and how to fix the issues. The chapter is useful to understand the basics of multiple clock domain designs, glitch free clock mux design and the skews in the design.