This chapter will design silicon-based integrated DONN chips for different classification tasks based on the silicon-based integrated DONN model introduced in Chap. 2 . Firstly, the structure parameters of the silicon-based integrated DONN are trained separately according to specific classification tasks. Then, the designed silicon-based integrated DONNs are verified through simulation using the optical simulation software 2.5D FDTD. Subsequently, silicon-based integrated DONN chips are fabricated and tested. Additionally, this chapter analyzes the possible system errors and their sources that may arise during chip fabrication, packaging, and experimental testing. The specific chapter arrangements are as follows: Sect. 3.1 will introduce the structure design and simulation verification of the binary classification silicon-based integrated DONN chip. Section 3.2 will cover the structure design, chip fabrication, experimental testing, and system error compensation scheme of the ternary classification silicon-based integrated DONN chip. Section 3.3 will introduce the structure design, chip fabrication, experimental testing, system error compensation, and test result analysis of the ten classification silicon-based integrated DONN chip. Finally, Sect. 3.4 will analyze and discuss the advantages and limitations of the silicon-based integrated DONN chip and compare its performance with that of silicon-based integrated ONNs realized by other methods.