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This study focuses on improving the manufacturing process for floating P-type regions in trench-insulated gate bipolar transistors (IGBTs) with high conductivity. The method involves deep trench etching followed by P-type ion implantation and backfilling with oxide pillars to create the device. Compared to the traditional method of backfilling with P-type doped poly-Si pillars, this approach significantly enhances process feasibility. By using this process, the floating P-type deep trench oxide pillars are separated from the trenches to form independent P-type oxide pillars. This method retains the advantage of the original high-conductivity IGBT in altering hole flow direction, maintaining low VCE(sat) (Long, 2015 IEEE applied power electronics conference and exposition, 2015 [1]; Pulikkathodi et al., Investigation in characteristics of 1200 V vertical IGBT for different trench designs, 2013 [2]; Motto et al., Conference record of 1998 IEEE industry applications conference [3]), while also reducing the excess carriers at the emitter, thereby shortening the switching time and significantly lowering switching losses. Additionally, this approach can reduce the electric field intensity at the bottom of the gate, improving the breakdown voltage of the device while maintaining its original characteristics.

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650 V Multiple Floating P Oxide-Trenches High-Conductivity Insulated Gate Bipolar Transistor Design

  • 会议论文

  • 发表日期：

    2026年

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  • Chih-Hung Hsu,
  • Chih-Chia Hu,
  • Zhan-Shuo Dong,
  • Feng-Tso Chien

摘要

This study focuses on improving the manufacturing process for floating P-type regions in trench-insulated gate bipolar transistors (IGBTs) with high conductivity. The method involves deep trench etching followed by P-type ion implantation and backfilling with oxide pillars to create the device. Compared to the traditional method of backfilling with P-type doped poly-Si pillars, this approach significantly enhances process feasibility. By using this process, the floating P-type deep trench oxide pillars are separated from the trenches to form independent P-type oxide pillars. This method retains the advantage of the original high-conductivity IGBT in altering hole flow direction, maintaining low VCE(sat) (Long, 2015 IEEE applied power electronics conference and exposition, 2015 [1]; Pulikkathodi et al., Investigation in characteristics of 1200 V vertical IGBT for different trench designs, 2013 [2]; Motto et al., Conference record of 1998 IEEE industry applications conference [3]), while also reducing the excess carriers at the emitter, thereby shortening the switching time and significantly lowering switching losses. Additionally, this approach can reduce the electric field intensity at the bottom of the gate, improving the breakdown voltage of the device while maintaining its original characteristics.