Arithmetic Logic Units (ALUs) of computing systems are designed with Full Adder (FA) circuits as essential elements. Due to the rise in demand for low-power devices and high-performance computer systems, there has recently been a huge increase in research interest in this area. A passive device named memristor uses little power, and is very scalable. Moore's Law is getting increasingly difficult to maintain as we scale down our transistor, but because of memristor’s unique ability to be used at the metal level, this will be possible. In this paper, using CMOS memristor hybrid circuit, logic gates have been implemented followed by the implementation of full adder using these gates. Results of transient analysis for 1 V in the Cadence Virtuoso tool revealed that the hybrid CMOS memristor based full adder are significantly quicker than traditional CMOS adders, use less space and power.