This work introduces a novel integrated three-step gray code to (SSD) seven-segment display converter using 45 nm technology of CMOS Transistors on Cadence Virtuoso. The gray code to SSD converter is used in the rotary encoder, bike speedometer, and similar applications. In this work, gray code to binary code converter, binary code to BCD code converter, and BCD to SSD converter using transmission gates are implemented and then integrated to obtain the final circuit. The isolated conversions consumed 398.159 nW, 530 nW, and 2.253 uW, respectively, and the overall power consumption is 26.0904 uW. The delay of the final integrated circuit is 162 ps.

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Design of a Novel Integrated Three-Step Gray to Seven-Segment Code Converter on Cadence Virtuoso Using 45 nm CMOS Transistors

  • Prachi Mukherji,
  • Seema Rajput,
  • Nandini A. Nawle,
  • Mayuri M. Pame,
  • Navya Mishra,
  • Vibhavari A. Narsale

摘要

This work introduces a novel integrated three-step gray code to (SSD) seven-segment display converter using 45 nm technology of CMOS Transistors on Cadence Virtuoso. The gray code to SSD converter is used in the rotary encoder, bike speedometer, and similar applications. In this work, gray code to binary code converter, binary code to BCD code converter, and BCD to SSD converter using transmission gates are implemented and then integrated to obtain the final circuit. The isolated conversions consumed 398.159 nW, 530 nW, and 2.253 uW, respectively, and the overall power consumption is 26.0904 uW. The delay of the final integrated circuit is 162 ps.