The article analyzes the development features of processor components implemented as part of a programmable logic integrated circuit (FPGA). The FPGA architecture features determine the use of optimal design techniques that use recommended operating modes of logic cells and specialized hardware components. The article considers the characteristics of typical processor components synthesized on the basis of logic cells and memory components included in FPGA chips. It is determined that the size of the register file implemented on the basis of FPGA cells is significantly larger than the size of the arithmetic logic unit supporting the main list of operations and implemented on the basis of the same cells. Therefore, a promising way to develop processor architectures for FPGA is to complicate the arithmetic logic unit by cascading its submodules. This approach should combine the study of typical command sequences that can be generated by compilers for the subject areas of the processor. In addition, the complexity of the arithmetic logic device is limited by the features of the architecture of the FPGA logic cells.