Efficient VLSI Architecture of an Approximate Radix-8 Booth Multiplier for Image Multiplication
摘要
Approximate computing is emerging as a powerful approach in multiplier design, enabling a trade-off between speed, power efficiency, and computational accuracy. This work presents the Approximate Booth Multiplier (AxBM), which leverages Radix-8 Booth encoding and incor porates approximate adders to simplify partial product generation and reduce hardware complexity. A key application explored is image multiplication, where AxBM proves highly effective. The use of energy-efficient approximation techniques, including error compensation, enables the system to lower power consumption and computation delay, while still delivering acceptable image quality. The results highlight the importance of approximate adders in enhancing performance for error-resilient applications, demonstrating AxBM’s suitability for domains such as image processing, signal processing, and machine learning, where power efficiency and speed are critical.