In a traditional von Neumann machine, execution involves moving operands from memory to the CPU, performing arithmetic or logical operations on them, and then storing the results back in memory. For data centric computation, such memory wall (data movement between CPU and memory) causes hindrance for high speed computation. In this work, we propose an architecture such that the arithmetic – logical operations can be done in-memory with minimal involvement of the CPU. The in-memory computing (IMC) architecture is developed around the cellular automata (CA) framework configured in SRAM without any major change in SRAM structure. The proposed design is then employed to illustrate the effective realization of in-memory search operation.