Cryptography is essential for protecting sensitive information, especially in technologies like IoT devices, embedded systems, and wireless sensor networks. Among the lightweight encryption methods, the Speck algorithm—introduced by the NSA—has gained attention for its ability to balance strong security with high efficiency. This research work is centered on the design, simulation, and hardware implementation of the Speck algorithm using Verilog at the RTL (Register Transfer Level). The main goal is to create effective Verilog code, validate its accuracy through simulations, and ensure the design works reliably. The implementation covers key expansion, encryption, and decryption processes, with an emphasis on optimizing performance and reducing hardware area. To confirm the correctness of the design, simulations were carried out with a series of test cases, making sure that both encryption and decryption function as expected. The outcome of this work contributes to the broader field of hardware-based security, offering a compact, efficient, and scalable solution. Such an implementation makes the Speck algorithm well-suited for IoT and embedded system applications, where lightweight yet secure cryptography is crucial. Simulation results show the power of the method developed & presented here.