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Orthogonal Time Frequency Space (OTFS) modulation offers strong resilience to Doppler and multipath effects in high-mobility wireless environments, making it a good candidate for the next 6G cellular communications. However, it relies on complex equalization techniques like Linear Minimum Mean Square Error (LMMSE). This paper proposes an optimized digital hardware architecture to accelerate Gram matrix computation, central to LMMSE, by exploiting the structured sparsity of the channel matrix in Zero-Padded OTFS modulation. A closed-form expression for the diagonals of the Gram matrix enables efficient parallel evaluation. Implemented on an AMD ZCU111 RFSoC FPGA, the design achieves up to five orders of magnitude latency reduction over software, with low resource usage, making it well suited for real-time OTFS demodulation.

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Optimized Digital Architecture for Gram Matrix Computation in OTFS Demodulation

  • 会议论文

  • 发表日期：

    2026年

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  • Simone Acciarito,
  • Gian Carlo Cardarilli,
  • Luca Di Nunzio,
  • Riccardo La Cesa,
  • Marco Re,
  • Sergio Spanò,
  • Cristian Valenti

摘要

Orthogonal Time Frequency Space (OTFS) modulation offers strong resilience to Doppler and multipath effects in high-mobility wireless environments, making it a good candidate for the next 6G cellular communications. However, it relies on complex equalization techniques like Linear Minimum Mean Square Error (LMMSE). This paper proposes an optimized digital hardware architecture to accelerate Gram matrix computation, central to LMMSE, by exploiting the structured sparsity of the channel matrix in Zero-Padded OTFS modulation. A closed-form expression for the diagonals of the Gram matrix enables efficient parallel evaluation. Implemented on an AMD ZCU111 RFSoC FPGA, the design achieves up to five orders of magnitude latency reduction over software, with low resource usage, making it well suited for real-time OTFS demodulation.