Time series analysis (TSA) is an important technique for extracting information from data in various domains. TSA is memory-bound on conventional platforms due to excessive off-chip data movement between processing units and the main memory of the system. Near data processing (NDP) has emerged as a promising solution to alleviate the bottleneck of memory access for data-intensive applications by enabling processing to be performed near the data within memory. In this work, we propose and implement upTSA, a parallel near data processing accelerator on real-world commercial DRAM Dual-Inline Memory Module (DIMM) NDP hardware. Our solution offers high bandwidth with large memory capacity and multi-level parallelism to accelerate TSA. We begin with a detailed characterization of TSA on conventional CPUs. We then design and implement a multi-level parallel accelerator on the real-world DIMM-based NDP hardware UPMEM. We further explore the hardware enhancements to improve the computational capability of current DIMM NDP hardware. Experimental results show that upTSA improves performance by 2.1 \({\times }\) compared to the server-class CPU baseline. The enhanced DIMM NDP architecture achieves up to 3.3 \({\times }\) speedup on TSA compared with current commercial NDP hardware.