Incorporating Cryptoprocessor on RISC-V Architecture
摘要
In recent years, the RISC-V architecture has emerged as a promising platform for embedded systems, offering flexibility and open-source accessibility. Consequently,the demand for secure communication in embedded devices, particularly within the Internet of Things (IoT) ecosystem, has driven the adoption of cryptographic algorithms. Integrating cryptographic functionalities into RISC-V architecture presents unique challenges, requiring innovative solutions to optimize performance and security. In response, the proposed design introduces an approach to address these challenges by incorporating a dedicated cryptoprocessor module into the RISC- V architecture specifically designed to handle encryption and decryption tasks efficiently. The cryptoprocessor module employs the Blowfish-64 algorithm to ensure robust security while lowering the computational overhead. Blowfish is a well-established symmetric-key block cipher known for its simplicity and efficiency. The compact design of the cryptoprocessor module significantly reduces resource utilization and execution time compared to existing implementations while preserving security and functionality. The design emphasizes low resource utilization, achieving a utilization rate of 34% (11,340 out of 33,216 available units) with an execution time of 160 ns. The implementation is carried out using Verilog HDL for the Cyclone II EP2C35F672C6 based FPGA.