This chapter explores the computational foundations, architectural evolution, and deployment strategies for integrating Generative AI (GenAI) into Radio Access Networks (RAN), particularly in the context of cloud-native frameworks like Open RAN (O-RAN) and Virtualized RAN (vRAN). As RAN transitions from proprietary baseband hardware to software-defined, disaggregated systems that operate on Commercial Off-The-Shelf (COTS) compute infrastructure, it unlocks new capabilities for colocating PHY-layer signal processing with AI/GenAI workloads on shared heterogeneous compute platforms. These platforms include CPUs with AVX-512 and AMX extensions, GPUs equipped with fourth-generation Tensor Cores (e.g., NVIDIA H100/H200), and SmartNICs or DPUs such as BlueField-3 and Marvell Octeon. The chapter establishes a mathematical equivalence between signal processing operations (e.g., FFTs, SVD, MMSE) and AI building blocks (e.g., matrix multiplications, dot products, attention), noting that both domains are dominated by linear algebra and parallel multiply-accumulate computations. It presents performance and latency benchmarks across compute platforms, comparing the real-time suitability of different accelerators for both deterministic RAN workloads and batch-based GenAI inference tasks. A historical perspective illustrates how computational advances have been key enablers of each wireless generation—from the DSP-based 2G/3G era to multi-core CPU-based 4G LTE and now the GPU-accelerated, AI-native architecture of 5G and 6G RAN ( https://arxiv.org/html/2411.17712v1 ; https://arxiv.org/html/2506.09505 ). The convergence of compute and communications is no longer aspirational but demonstrated in real-world networks. In particular, two Samsung vRAN deployments are examined: the first showcases Samsung vRAN 3.0, which has powered over 50,000 O-RAN-compliant sites with intelligent orchestration and cloud automation; the second describes AI-enhanced Layer-1 channel estimation within Samsung’s vDU infrastructure, where convolutional neural networks improve accuracy and reduce hardware load, as published in IEEE research. These examples highlight how AI is no longer just augmenting RAN—it is becoming embedded within it. The chapter further outlines a growing set of GenAI use cases across the RAN stack: real-time beamforming optimization, enhanced channel estimation using deep learning, LLM-driven intent-based orchestration in the RIC, workload offloading from user devices to the RAN edge, and multi-tenancy where GenAI and vRAN processes share common GPU/CPU/DPUs through advanced orchestration primitives like MIG and SR-IOV. The chapter closes with a proposed architecture for unified heterogeneous System-on-Chip (SoC) designs that integrate CPU, GPU, DSP, NIC, and AI accelerator blocks into a tightly coupled, programmable infrastructure—capable of meeting both the latency and throughput demands of RAN and GenAI concurrently. Overall, the chapter highlights how computational innovation is not only enabling GenAI for RAN but also redefining the RAN itself as a real-time, AI-native platform.

Computational Aspects of Generative-AI on Radio Access Networks (RAN)

章节
发表日期：

2026年

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Mahantesh Kothiwale,
Anshuman Nigam

摘要

This chapter explores the computational foundations, architectural evolution, and deployment strategies for integrating Generative AI (GenAI) into Radio Access Networks (RAN), particularly in the context of cloud-native frameworks like Open RAN (O-RAN) and Virtualized RAN (vRAN). As RAN transitions from proprietary baseband hardware to software-defined, disaggregated systems that operate on Commercial Off-The-Shelf (COTS) compute infrastructure, it unlocks new capabilities for colocating PHY-layer signal processing with AI/GenAI workloads on shared heterogeneous compute platforms. These platforms include CPUs with AVX-512 and AMX extensions, GPUs equipped with fourth-generation Tensor Cores (e.g., NVIDIA H100/H200), and SmartNICs or DPUs such as BlueField-3 and Marvell Octeon. The chapter establishes a mathematical equivalence between signal processing operations (e.g., FFTs, SVD, MMSE) and AI building blocks (e.g., matrix multiplications, dot products, attention), noting that both domains are dominated by linear algebra and parallel multiply-accumulate computations. It presents performance and latency benchmarks across compute platforms, comparing the real-time suitability of different accelerators for both deterministic RAN workloads and batch-based GenAI inference tasks. A historical perspective illustrates how computational advances have been key enablers of each wireless generation—from the DSP-based 2G/3G era to multi-core CPU-based 4G LTE and now the GPU-accelerated, AI-native architecture of 5G and 6G RAN ( https://arxiv.org/html/2411.17712v1 ; https://arxiv.org/html/2506.09505 ). The convergence of compute and communications is no longer aspirational but demonstrated in real-world networks. In particular, two Samsung vRAN deployments are examined: the first showcases Samsung vRAN 3.0, which has powered over 50,000 O-RAN-compliant sites with intelligent orchestration and cloud automation; the second describes AI-enhanced Layer-1 channel estimation within Samsung’s vDU infrastructure, where convolutional neural networks improve accuracy and reduce hardware load, as published in IEEE research. These examples highlight how AI is no longer just augmenting RAN—it is becoming embedded within it. The chapter further outlines a growing set of GenAI use cases across the RAN stack: real-time beamforming optimization, enhanced channel estimation using deep learning, LLM-driven intent-based orchestration in the RIC, workload offloading from user devices to the RAN edge, and multi-tenancy where GenAI and vRAN processes share common GPU/CPU/DPUs through advanced orchestration primitives like MIG and SR-IOV. The chapter closes with a proposed architecture for unified heterogeneous System-on-Chip (SoC) designs that integrate CPU, GPU, DSP, NIC, and AI accelerator blocks into a tightly coupled, programmable infrastructure—capable of meeting both the latency and throughput demands of RAN and GenAI concurrently. Overall, the chapter highlights how computational innovation is not only enabling GenAI for RAN but also redefining the RAN itself as a real-time, AI-native platform.