With the continuous development of deep learning technology, the reasoning of AI models is becoming more and more complex, and the requirements for reasoning speed and computing efficiency are gradually increasing. As a bridge between deep learning models and hardware platforms, AI compilers play a vital role in reasoning acceleration and optimization. Especially on heterogeneous computing platforms (Graphics Processing Units, Tensor Processing Units, and Field-Programmable Gate Arrays), AI compilers significantly improve reasoning efficiency through precise hardware adaptation, resource scheduling, and optimization strategies. This paper deeply explores the reasoning acceleration and optimization of AI compilers on heterogeneous platforms, focusing on technologies such as automated optimization, quantization, pruning, and operator fusion, and analyzes the adaptation strategies of different hardware platforms and their applications in reasoning acceleration. Experimental results show that after automated optimization, the reasoning time of the GPU platform is reduced by 20%, the reasoning time of the TPU platform is reduced by 18%, and the memory consumption is reduced by 8% and 5%, respectively. In addition, quantization optimization improves the reasoning throughput by 40% and 35% on the GPU and TPU platforms, respectively, and pruning optimization reduces the reasoning time on the FPGA platform by 35%. Finally, this paper discusses the challenges currently faced by AI compilers on heterogeneous computing platforms and looks forward to future development directions.