With the explosion of neural networks, IoT devices, and their applications, the need for efficient architectures that can run on IoT devices has expanded as well. IoT devices generally do not have much computational power, nor do they have the same precision as general-purpose CPUs or GPUs. This limits the choice of neural network architectures to smaller ones, which achieve good enough accuracy levels for the intended purpose. In addition, memory usage on such devices is of great importance since IoT devices are often used as the first sensing point with limited resources in a system where more precise decisions are made remotely. Considering the existence of the efficient compute frontier, this can be leveraged to make decisions on the type of architecture that is used on the device, while maintaining the necessary accuracy levels. This comes down to selecting a model with a proven accuracy level on non-IoT devices that is small enough. In this paper, a selection process and analysis of the performance of the selected model on an ESP32 device are presented. The experiment was performed on an ESP32 device. The purpose of this paper is to explore the possibility of using information obtained during model training to determine which architectures will reach desired performance levels while conforming to the restrictions of an edge device. The results have demonstrated that testing the models before their deployment on edge devices can be used to make an informed decision regarding the choice of model architecture.

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Optimizing Neural Network Architectures for Edge and IoT Devices Based on the Efficient Compute Frontier for Maximal Computational Efficiency

  • Faruk Herenda,
  • Tarik Hubana,
  • Migdat Hodzic

摘要

With the explosion of neural networks, IoT devices, and their applications, the need for efficient architectures that can run on IoT devices has expanded as well. IoT devices generally do not have much computational power, nor do they have the same precision as general-purpose CPUs or GPUs. This limits the choice of neural network architectures to smaller ones, which achieve good enough accuracy levels for the intended purpose. In addition, memory usage on such devices is of great importance since IoT devices are often used as the first sensing point with limited resources in a system where more precise decisions are made remotely. Considering the existence of the efficient compute frontier, this can be leveraged to make decisions on the type of architecture that is used on the device, while maintaining the necessary accuracy levels. This comes down to selecting a model with a proven accuracy level on non-IoT devices that is small enough. In this paper, a selection process and analysis of the performance of the selected model on an ESP32 device are presented. The experiment was performed on an ESP32 device. The purpose of this paper is to explore the possibility of using information obtained during model training to determine which architectures will reach desired performance levels while conforming to the restrictions of an edge device. The results have demonstrated that testing the models before their deployment on edge devices can be used to make an informed decision regarding the choice of model architecture.