Packaging
摘要
This chapter provides an overview of advanced packaging technologies. It begins with the evolution from traditional wire bonding to flip-chip packaging, followed by the introduction of 2.5D integration technologies including CoWoS and EMIB. Wafer-level packaging with redistribution layers, including both fan-in and fan-out approaches, is discussed. Package-on-package technology is a solution for integrating logic and memory for mobile devices. Hybrid bonding is highlighted as a key enabler of high-density vertical integration in 3D-ICs. A broader perspective of 3D integration landscape is presented, categorizing integration across various levels, which includes the convergence of front-end 3D and back-end 3D technologies. Si photonics is the solution for high-speed data transmission using light. Finally, it highlights key polymer materials that enable modern advanced packaging architectures. The cover image of this chapter is the world’s first 2.5D packaging using TSMC’s CoWoS technique, which is adopted by Xilinx in 2013. © 2025 Advanced Micro Devices, Inc., Reprinted with permission.