FREYA: An Event-Driven SoC for Spiking End-to-End Classification
摘要
This chapter builds further on the level-crossing analog-to-digital converter (LCADC) from the previous chapter. The discrete-time (DT) LCADC introduced in Chap. 4 showed a good power efficiency. Furthermore, the synchronous but event-driven nature allows the LCADC to be multiplexed, which is typically not possible with regular asynchronous LCADCs. To extend the advantage of LCADCs also to the processing part of a system, they can be integrated together with spiking neural networks (SNNs). The event-driven output of LCADCs can be used as the spike train input of SNNs, on which they can perform signal classification. This chapter will present the design of an event-driven system-on-chip (SoC), called FREYA. FREYA uses the LCADC as a multichannel analog-to-spike converter (ASC) that provides an input to an on-chip SNN processor that can perform signal classification. As target application, multichannel electrocardiogram (ECG) readout and classification has been chosen.