The System which uses Residue Number System need to deliberately select moduli set, so that it is more useful in forward conversion and reverse conversion for the better Performance. In this paper, Conjugate moduli set \( \left\{ {2^{{n_{1} }} - 1,2^{{n_{1} }} + 1,2^{{n_{2} }} - 1,2^{{n_{2} }} + 1,2^{{n_{3} }} - 1,2^{{n_{3} }} + 1, \ldots 2^{{n_{L} }} - 1,2^{{n_{L} }} + 1} \right\}\) proposed to use in forward conversion and reverse conversion methods to obtain optimized area and delay values. For verifying the results, the software tool used is Xilinx 14.7 ISE with Virtex-7 FPGA kit and the targeted device xc7vx330t-3ffg1157. The proposed Conjugate moduli set based Forward Conversion and Reverse Conversion compared with the different moduli sets available in the literature and corresponding codes written in Verilog HDL code, compiled, simulated with the help of ISIM Simulator. After this, it is Synthesized for utilization summary. From the performance comparison, Proposed moduli set in forward conversion contributed area 26.32% increased and delay 19.19% decreased and on the other side i.e. in reverse conversion methods, CRT had the improvement in area 62.03% and in delay 30.73%, MRC had the improvement in area 13.41% and in delay worse performance by −24.02%, New CRT-I had the improvement in area 23.52% and in delay 22.73%, New CRT-II had the improvement in area 18.71% and in delay 27.23%. These obtained results can be useful in applications like DSP Signal processing applications, Radar Signal processing applications [22].