Design of Combinatorial LFSR for Multimode Test Applications
摘要
Because of the random nature of sequence generation, LFSR (Linear Feedback Shift Register) has its use in many applications in cryptography systems, BIST architectures, pseudo-noise sequence generation, quick digital counters, weighing sequences, and other areas where pseudo-random sequences are required. Primitive characteristic polynomials are essential for producing maximum-length random sequences, but they take a lot of time to generate and are best utilized in situations when thorough circuit testing is necessary. On the other hand, non-primitive characteristic polynomials make the essential test with ease and fast with its dynamic sequence generation behavior. In memory testing kind of applications, random tests are essential, at the same time test time should be minimal. In such a scenario, LFSRs with fixed primitive polynomial architectures cannot be easily replaced with their counterpart of non-primitive LFSRs. Hence as a solution, in this paper, a combinatorial LFSR design, working, and analysis with other types of LFSRs is presented. It is observed that the proposed combinatorial LFSR is good with performance of power consumption 16.36uw, with an area of 136.91um2 with minimal slack of data arrival time of 0.18 ns with all the design modes. Also, the proposed combinatorial LFSR is implemented in benchmark BRAM BIST memory of sizes 8, 16, 32, 64, and 128 for validating the results.