A selection methodology for the Si EMM device used for the BaSIC(EMM) topology is needed based on the information provided by manufacturers in their datasheets. This chapter describes a procedure for methodically selecting the Si EMM device to optimize and enhance the performance of the BaSIC(EMM) topology. The characteristics of the Si EMM devices provided in their datasheets which are the most appropriate for this application are defined here. The key device parameters are (1) the on-resistance at 25 °C for the Si EMM devices at various gate bias voltages and (2) the drain saturation currents at these gate bias voltages at 150–175 °C. The choice of these temperatures is justified by the thermal analysis of the Si EMM devices during normal circuit operation and the short-circuit event. It is shown that a short-circuit time to 10 μs can be achieved for a 1.2 kV SiC 160 mΩ power MOSFET product with an increase in on-resistance of only 3% by using the selection methodology described in this chapter.