The Advanced Encryption Standard (AES) is the only approved symmetric encryption algorithm by security agencies such as the National Institute of Standards and Technology (NIST). The algorithm is designed to be fast and robust against cryptanalysis attacks. However, the original design lacks of any countermeasure against a novel class of attacks: side-channel attacks. This vulnerability necessitates the implementation of supplementary security measures to guarantee AES security in a deployment scenario. This paper explores a solution that targets the AES Substitution Box (S-Box) structure. The original S-Box is replaced with novel structures inherently more resistant to power-based side channel attacks. This concept is demonstrated by testing six different novel S-Box implementations. Each is subjected to real experiments via a correlation power analysis attack on an AES hardware implementation. A complete comprehension of their effectiveness is gained by comparing the results found to those derived from the AES SW implementation. The solution investigated leverages the inherent mathematical properties of the S-Box to provide a lightweight countermeasure against power analysis side-channel attacks with zero implementation cost.

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Performance Comparison: Software vs. Hardware Implementation of Novel S-Box Designed to Resist Power Analysis Attack

  • Mattia Mirigaldi,
  • Maurizio Martina,
  • Guido Masera

摘要

The Advanced Encryption Standard (AES) is the only approved symmetric encryption algorithm by security agencies such as the National Institute of Standards and Technology (NIST). The algorithm is designed to be fast and robust against cryptanalysis attacks. However, the original design lacks of any countermeasure against a novel class of attacks: side-channel attacks. This vulnerability necessitates the implementation of supplementary security measures to guarantee AES security in a deployment scenario. This paper explores a solution that targets the AES Substitution Box (S-Box) structure. The original S-Box is replaced with novel structures inherently more resistant to power-based side channel attacks. This concept is demonstrated by testing six different novel S-Box implementations. Each is subjected to real experiments via a correlation power analysis attack on an AES hardware implementation. A complete comprehension of their effectiveness is gained by comparing the results found to those derived from the AES SW implementation. The solution investigated leverages the inherent mathematical properties of the S-Box to provide a lightweight countermeasure against power analysis side-channel attacks with zero implementation cost.