In many computer systems, the need for effective and high-performance multiplication processes has been increasing quickly. This work gives a thorough performance analysis of a Kogge-Stone adder-based 16-bit Dadda Multiplier. The goal is to assess the multiplier designs computational effectiveness and speed while taking things like power usage and space utilization into account. The performance analysis findings show that the 16-bit Dadda Multiplier, which uses the Kogge-Stone adder architecture, is superior to other multiplier designs. The experimental results show important improvements in multiplication speed due to a reduction in the critical path delay. This work is done with 90 nm technology. By utilizing the parallelism provided by the Kogge-Stone adder, the suggested architecture also demonstrates considerable improvements in power efficiency. A more compact solution is also suggested by the area utilization study, allowing for easier integration into integrated circuits. The findings of this study aid in the selection and optimization of multiplier designs in various computing applications as well as the body of information on effective multiplication methods. The results provided in this paper demonstrate the benefits of combining the 16-bit Dadda Multiplier with the Kogge-Stone adder and show how it can improve computing performance while taking power and space limits into account. In this the total power of the system reduced by 4.8% and the total area also reduced by 8.3%.