In a recent paper by Banik et al. at IACR TCHES 2024, the authors have constructed hardware circuits to compute the Möbius Transform of a Boolean function using polynomial space. This core circuit is then used to solve equations over \(GF(2)\) of degree d (where d is typically a small integer). In this paper we outline two improvements to the above circuit that make it faster and consume even lower energy. The first comes from an observation of the purely combinatorial part of the circuit which extracts input indices of a truth table where the entry is zero. We show that the process can be extracted using a new circuit element that has much lower critical path. We also identify that the principal circuit component that contributed to the overall latency of the solver is the Expmob1 circuit that converts the algebraic form of a Boolean function to its truth table using a single cycle. We show that if suitably spaced pipeline stages are inserted in it, both the energy consumption and total circuit latency can be reduced. We end the paper by implementing our circuit on the SAKURA-X fpga device for solving quadratic equations of moderately sizes.