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SHA-3-512bits offers stronger cryptographic security than SHA1, SHA 2, and SHA3-256bits.This paper describes a SHA-3-512bits hash function utilizing the Sponge-based Keccak Algorithm. Four alternate messages digest lengths of 512 bits, 384 bits, 256 bits, and 224 bits are allowed by the SHA3 hash algorithm, depending on the hash function in use. The SHA3-512 function operates on a single instance, processing input messages at a rate of 72 bytes per 1096 cycles at 316.25 MHz and a 1600 bits data path with a round-iterative structure. The SHA-3-512bits is verified by VIVADO 2017.2 version software with hardware implementation on FPGA ARTIX-7 device. The proposed method consumed power is 192.334W and occupied an area of 2493 LUTs, Flip-Flops 1876 and IOB’s 17.65% of ARTIX-7 FPGA device and became cost-effective device used ARTEX-7.

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A Novel Approach of SHA-3-512bits Using Keccak Technique Based on Sponge Function Implementation on FPGA

  • 会议论文

  • 发表日期：

    2025年

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  • K. Janshi Lakshmi,
  • G. Sreenivasulu

摘要

SHA-3-512bits offers stronger cryptographic security than SHA1, SHA 2, and SHA3-256bits.This paper describes a SHA-3-512bits hash function utilizing the Sponge-based Keccak Algorithm. Four alternate messages digest lengths of 512 bits, 384 bits, 256 bits, and 224 bits are allowed by the SHA3 hash algorithm, depending on the hash function in use. The SHA3-512 function operates on a single instance, processing input messages at a rate of 72 bytes per 1096 cycles at 316.25 MHz and a 1600 bits data path with a round-iterative structure. The SHA-3-512bits is verified by VIVADO 2017.2 version software with hardware implementation on FPGA ARTIX-7 device. The proposed method consumed power is 192.334W and occupied an area of 2493 LUTs, Flip-Flops 1876 and IOB’s 17.65% of ARTIX-7 FPGA device and became cost-effective device used ARTEX-7.