IoT applications rely on low power consumption, low cost, and small footprint. Such applications are typically battery-powered and require multiple voltage rails to supply the radio, the digital processor, external flash memory, I/O, external peripherals, etc. These voltages typically range between 0.5 and 1.8 V with comparable power consumption from each rail. A single-input four-output buck converter, designed for a Bluetooth low-energy SoC, allows powering the complete system using minimal external components at much higher efficiencies than those obtainable with LDOs or with a single-output buck converter. The converter employs an a-synchronous digital controller and powers the SoC as well as supplies up to 200 mA for external peripherals while consuming less than 1 μA of quiescent current. This allows the converter to operate during the sleep mode, when much of the power is consumed. At a load of 10 μA per output, the system uses only 60% of the power it would require when using LDOs, whilst being able to compete with a combination of a very-high-efficiency single-output converter and LDOs under high load. This paper focuses on the design aspects of a multiple output converter, especially the control scheme, and provides insight on how the low-quiescent current was achieved.

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A SIMO Buck Converter for IOT Applications with SUB-1 μA Quiescent Current

  • Jasper Velner

摘要

IoT applications rely on low power consumption, low cost, and small footprint. Such applications are typically battery-powered and require multiple voltage rails to supply the radio, the digital processor, external flash memory, I/O, external peripherals, etc. These voltages typically range between 0.5 and 1.8 V with comparable power consumption from each rail. A single-input four-output buck converter, designed for a Bluetooth low-energy SoC, allows powering the complete system using minimal external components at much higher efficiencies than those obtainable with LDOs or with a single-output buck converter. The converter employs an a-synchronous digital controller and powers the SoC as well as supplies up to 200 mA for external peripherals while consuming less than 1 μA of quiescent current. This allows the converter to operate during the sleep mode, when much of the power is consumed. At a load of 10 μA per output, the system uses only 60% of the power it would require when using LDOs, whilst being able to compete with a combination of a very-high-efficiency single-output converter and LDOs under high load. This paper focuses on the design aspects of a multiple output converter, especially the control scheme, and provides insight on how the low-quiescent current was achieved.