Among recent trends in power electronics, monolithic integration of power converters is gaining increased popularity with particular interest toward hybrid DCDC converters. These converters offer multiple advantages, from decreased voltage stress on the switches to reduced size of external components, leading to smaller PCB footprint, volume, and weight. Hybrid power converter integration brings analog design challenges due to the presence of multiple floating supply rails, fast gate drivers, and level shifters. Moreover, ensuring the balancing of flying capacitor (FC) leads to additional complexity in the feedback loop architecture. A comparison among different control techniques ranging from voltage to current mode control is provided, both in analog and in digital domain with special attention dedicated to FC balancing techniques. A practical implementation of a \({28}\,\mathrm {V}\) -to- \({3.3}\,\mathrm {V}\) , \({2}\,\mathrm {A}\) fully monolithic 3-Level Hybrid Flying Capacitor (3LHFC) in \({130}\,\mathrm {nm}\) HV-CMOS is shown including experimental results.

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Design, Control, and Implementation of Fully Monolithic Hybrid Power Converters

  • Nicolò Zilio,
  • Matteo Agostinelli

摘要

Among recent trends in power electronics, monolithic integration of power converters is gaining increased popularity with particular interest toward hybrid DCDC converters. These converters offer multiple advantages, from decreased voltage stress on the switches to reduced size of external components, leading to smaller PCB footprint, volume, and weight. Hybrid power converter integration brings analog design challenges due to the presence of multiple floating supply rails, fast gate drivers, and level shifters. Moreover, ensuring the balancing of flying capacitor (FC) leads to additional complexity in the feedback loop architecture. A comparison among different control techniques ranging from voltage to current mode control is provided, both in analog and in digital domain with special attention dedicated to FC balancing techniques. A practical implementation of a \({28}\,\mathrm {V}\) -to- \({3.3}\,\mathrm {V}\) , \({2}\,\mathrm {A}\) fully monolithic 3-Level Hybrid Flying Capacitor (3LHFC) in \({130}\,\mathrm {nm}\) HV-CMOS is shown including experimental results.