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This paper introduces a high-voltage output-capacitorless voltage regulator designed for fast transient response to supply switching loads digital blocks directly from the high-voltage power rail. The proposed solution based on the current buffer Miller compensation, achieves a load current transient response of about \(1.6 \textrm{ns}\) and reduces silicon area by a factor of 2.25 compared to a high-voltage Flipped Voltage Follower-based topology.

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A High-Voltage LDO Voltage Regulator Featuring Enhanced Transient Response and Reduced Area

  • 会议论文

  • 发表日期：

    2025年

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  • Jacopo Serra,
  • Franco Fiori

摘要

This paper introduces a high-voltage output-capacitorless voltage regulator designed for fast transient response to supply switching loads digital blocks directly from the high-voltage power rail. The proposed solution based on the current buffer Miller compensation, achieves a load current transient response of about \(1.6 \textrm{ns}\) and reduces silicon area by a factor of 2.25 compared to a high-voltage Flipped Voltage Follower-based topology.