Abstract <p>A system for monitoring the operation of a laser interferometer in a reactive ion etching setup has been developed. For the precise calibration of the etching rate of the top silicon layer in silicon-on-insulator materials, a series of chips with identical structures were fabricated. The thickness of the structure on each chip varied depending on the etching time. The heights of the resulting steps were measured using the tapping mode of an atomic force microscope. For the etching mode in a plasma of CF<InlineEquation ID="IEq1"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq1.gif" Format="GIF" Height="10" Rendition="HTML" Resolution="72" Type="Linedraw" Width="8" /> </InlineMediaObject> <EquationSource Format="TEX">\({}_{4}\)</EquationSource>  </InlineEquation> and O<InlineEquation ID="IEq2"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq2.gif" Format="GIF" Height="10" Rendition="HTML" Resolution="72" Type="Linedraw" Width="8" /> </InlineMediaObject> <EquationSource Format="TEX">\({}_{2}\)</EquationSource>  </InlineEquation> gases (flow ratio <InlineEquation ID="IEq3"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq3.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="39" /> </InlineMediaObject> <EquationSource Format="TEX">\(20:5\)</EquationSource>  </InlineEquation>, pressure 4 Pa, power 40 W), the silicon etching rate was determined to be <InlineEquation ID="IEq4"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq4.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="72" /> </InlineMediaObject> <EquationSource Format="TEX">\(0.31\pm 0.1\)</EquationSource>  </InlineEquation> nm/s. The adduce parameters allow stopping silicon etching at a depth of <InlineEquation ID="IEq5"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq5.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="23" /> </InlineMediaObject> <EquationSource Format="TEX">\({\sim}5\)</EquationSource>  </InlineEquation> to <InlineEquation ID="IEq6"> <InlineMediaObject> <ImageObject Color="BlackWhite" FileRef="11972_2025_8758_Article_IEq6.gif" Format="GIF" Height="14" Rendition="HTML" Resolution="72" Type="Linedraw" Width="25" /> </InlineMediaObject> <EquationSource Format="TEX">\(120\)</EquationSource>  </InlineEquation> nm with an accuracy of no worse than 2 nm. The obtained results make it possible to address a number of tasks in the fabrication of various silicon nanoelectronic devices. In particular, the process of forming silicon channel nanowires for field-effect transistors requires high-precision control of the silicon layer thickness during reactive ion etching.</p>

System for Monitoring the Process of Reactive Ion Etching of Silicon for Nanostructure Fabrication

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发表日期：

2025年2月1日

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I. I. Tsiniaikin,
A. S. Andreeva,
P. O. Mikhailov,
M. A. Kolpakov,
G. V. Nibudin,
G. V. Presnova,
M. Yu. Rubtsova,
D. E. Presnov,
O. V. Snigirev,
V. A. Krupenin,
A. S. Trifonov

摘要

Abstract

A system for monitoring the operation of a laser interferometer in a reactive ion etching setup has been developed. For the precise calibration of the etching rate of the top silicon layer in silicon-on-insulator materials, a series of chips with identical structures were fabricated. The thickness of the structure on each chip varied depending on the etching time. The heights of the resulting steps were measured using the tapping mode of an atomic force microscope. For the etching mode in a plasma of CF \({}_{4}\) and O \({}_{2}\) gases (flow ratio \(20:5\) , pressure 4 Pa, power 40 W), the silicon etching rate was determined to be \(0.31\pm 0.1\) nm/s. The adduce parameters allow stopping silicon etching at a depth of \({\sim}5\) to \(120\) nm with an accuracy of no worse than 2 nm. The obtained results make it possible to address a number of tasks in the fabrication of various silicon nanoelectronic devices. In particular, the process of forming silicon channel nanowires for field-effect transistors requires high-precision control of the silicon layer thickness during reactive ion etching.