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<p>With the advent of artificial intelligence (AI) and explosive growth in applications utilizing vast amount of data, it is expected to usher in a new era of inflections in device technology. One of the key requirements to enable AI-based technology is high bandwidth memory devices with advanced processors. To meet these imminent challenges, there is a strong need for innovation and developing solutions for high-performing DRAM devices. In this paper, we present the latest developments on the plasma doping (PLAD) boron process that yields higher dopant retention with reduced damage. This is expected to significantly reduce the contact resistance (Rc) and improve Ion performance for DRAM peri-transistors. We have also evaluated effect of advanced anneal schemes, to further optimize the dopant profile. As DRAM devices continue to scale, reducing the Xj while maintaining high surface dopant conc. for superior Rc is critical for achieving desired performance for AI devices.</p> Graphical abstract <p></p>

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PMOS Rc reduction using B2H6 plasma doping process and advanced anneals for the current and next-gen DRAM devices

  • 期刊论文

  • 发表日期：

    2025年3月5日

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  • V. Bhosle,
  • M. Cai,
  • S. Sharma,
  • Ben Ng,
  • Michael Liu,
  • D. Raj

摘要

With the advent of artificial intelligence (AI) and explosive growth in applications utilizing vast amount of data, it is expected to usher in a new era of inflections in device technology. One of the key requirements to enable AI-based technology is high bandwidth memory devices with advanced processors. To meet these imminent challenges, there is a strong need for innovation and developing solutions for high-performing DRAM devices. In this paper, we present the latest developments on the plasma doping (PLAD) boron process that yields higher dopant retention with reduced damage. This is expected to significantly reduce the contact resistance (Rc) and improve Ion performance for DRAM peri-transistors. We have also evaluated effect of advanced anneal schemes, to further optimize the dopant profile. As DRAM devices continue to scale, reducing the Xj while maintaining high surface dopant conc. for superior Rc is critical for achieving desired performance for AI devices.

Graphical abstract