<p>Turbo product codes (TPCs) are a class of forward error correction codes that achieve high coding gain at high code rates through iterative decoding. To meet the flexible and scalable requirements of new communication systems, in this paper, a high-speed software TPC decoder on graphics processing unit (GPU) is proposed. The presented decoder exploits both inter-frame and intra-frame parallelism. Moreover, optimized data structure and on-chip memory allocations are conducted to improve memory access bandwidth. In addition, the asynchronous data transfer approach is employed to hide data transfer latency. The proposed <InlineEquation ID="IEq1"><EquationSource Format="TEX">\((64,57)^2\)</EquationSource><EquationSource Format="MATHML"><math><msup><mrow><mo stretchy="false">(</mo><mn>64</mn><mo>,</mo><mn>57</mn><mo stretchy="false">)</mo></mrow><mn>2</mn></msup></math></EquationSource></InlineEquation> TPC decoder on RTX3070 achieves 231.7 Mbps throughput with 5 iterations. Experimental results show that the proposed decoder obtains <InlineEquation ID="IEq2"><EquationSource Format="TEX">\(3.14\times\)</EquationSource><EquationSource Format="MATHML"><math><mrow><mn>3.14</mn><mo>×</mo></mrow></math></EquationSource></InlineEquation> throughput speedups compared with the existing method, at the cost of degraded latency performance.</p>

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High-throughput decoder for turbo product codes on GPU

  • Zhanxian Liu,
  • Mingjun Zhang,
  • Xiying Fan,
  • Shantong Sun,
  • Bin Dai

摘要

Turbo product codes (TPCs) are a class of forward error correction codes that achieve high coding gain at high code rates through iterative decoding. To meet the flexible and scalable requirements of new communication systems, in this paper, a high-speed software TPC decoder on graphics processing unit (GPU) is proposed. The presented decoder exploits both inter-frame and intra-frame parallelism. Moreover, optimized data structure and on-chip memory allocations are conducted to improve memory access bandwidth. In addition, the asynchronous data transfer approach is employed to hide data transfer latency. The proposed \((64,57)^2\)(64,57)2 TPC decoder on RTX3070 achieves 231.7 Mbps throughput with 5 iterations. Experimental results show that the proposed decoder obtains \(3.14\times\)3.14× throughput speedups compared with the existing method, at the cost of degraded latency performance.