Abstract <p>This study presents a comprehensive analysis aimed at optimizing the various parameters of a Step Channel-based Dual Metal Negative Capacitance Ge-Pocket Double Gate Tunnel Field-Effect Transistor (SCDMNC-HDGTFET). Because the functionality of this device is fundamentally reliant on band to band tunneling, its performance is strongly influenced by structural and material parameters. Accordingly, the effects of channel length (<i>C</i><sub>L</sub>), ferroelectric thickness (<i>t</i><sub>Fe</sub>), pocket length (<i>L</i><sub>PKT</sub>), and source/drain doping concentrations are examined to assess their impact on key metrics such as subthreshold swing, ON/OFF current ratio, and threshold voltage. The investigation identifies an optimal configuration consisting of a 30 nm channel, a 2 nm ferroelectric layer, and a 3 nm pocket length. Performance is further enhanced by employing a source concentration of 4 × 10<sup>20</sup> cm<sup>–3</sup> and a drain concentration of 1 × 10<sup>17</sup> cm<sup>–3</sup>. Under these optimized conditions, the device achieves an ON/OFF current ratio of ~10<sup>13</sup> and a minimum subthreshold swing of 18.12 mV/dec. These results underscore the strong potential of the SCDMNC-HDGTFET architecture for highly efficient, low-power electronic applications.</p>

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Assessment of Non-Uniform Channel-based Dual Metal Negative Capacitance Ge-Pocket Tunnel Field-Effect Transistor with Parametric Optimization for Low Power and High Frequency Applications

  • Rajeev Kumar Sachan,
  • Vedvrat,
  • Sushroot,
  • Divya Sharma

摘要

Abstract

This study presents a comprehensive analysis aimed at optimizing the various parameters of a Step Channel-based Dual Metal Negative Capacitance Ge-Pocket Double Gate Tunnel Field-Effect Transistor (SCDMNC-HDGTFET). Because the functionality of this device is fundamentally reliant on band to band tunneling, its performance is strongly influenced by structural and material parameters. Accordingly, the effects of channel length (CL), ferroelectric thickness (tFe), pocket length (LPKT), and source/drain doping concentrations are examined to assess their impact on key metrics such as subthreshold swing, ON/OFF current ratio, and threshold voltage. The investigation identifies an optimal configuration consisting of a 30 nm channel, a 2 nm ferroelectric layer, and a 3 nm pocket length. Performance is further enhanced by employing a source concentration of 4 × 1020 cm–3 and a drain concentration of 1 × 1017 cm–3. Under these optimized conditions, the device achieves an ON/OFF current ratio of ~1013 and a minimum subthreshold swing of 18.12 mV/dec. These results underscore the strong potential of the SCDMNC-HDGTFET architecture for highly efficient, low-power electronic applications.