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Abstract <p>The growing demand for terahertz wave detectors in high-speed wireless communication, real-time security imaging, and food inspection has driven significant interest in silicon-based solutions. Recent advances in Si field-effect transistors and CMOS-compatible Schottky barrier diodes have paved the way for scalable, multi-pixel THz imaging detectors. This work introduces a silicon nano-ring FET architecture by integrating the circular plasmonic confinement with CMOS-compatible fabrication. By employing an asymmetric source-drain configuration and grounding the outer ring source, the proposed design effectively reduces junction leakage and enhances radiation coupling efficiency. A photo response is enhanced 535 times as compared to prior devices with the same asymmetry ratio, whereas the intrinsic resistance limit is reduced from 8 to 0.13 μm. TCAD simulations are performed, which validate the analytical model, showing &lt;25% deviation between the predicted and simulated data. Therefore, the SNR-FET demonstrates an improvement in the performance ratio of 98.5%, sensitivity of 97.3%, responsivity of 95.6%, and conversion efficiency of 94.5%, along with an 8.3% reduction in noise equivalent power as compared to the existing models. The&#xa0;results confirm that the proposed SNR-FET allows room temperature, broadband detection capability of up to 0.2 THz and a pathway toward scalable, low-cost next-generation on-chip THz imaging and sensing systems.</p>

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Silicon Nano-Ring FET: A High-Performance Platform for Ultrafast Terahertz Detection

  • 期刊论文

  • 发表日期：

    2026年1月1日

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  • Shalini Maran,
  • Nagarajan Krishnan Kothalam,
  • Ramya Mohan

摘要

Abstract

The growing demand for terahertz wave detectors in high-speed wireless communication, real-time security imaging, and food inspection has driven significant interest in silicon-based solutions. Recent advances in Si field-effect transistors and CMOS-compatible Schottky barrier diodes have paved the way for scalable, multi-pixel THz imaging detectors. This work introduces a silicon nano-ring FET architecture by integrating the circular plasmonic confinement with CMOS-compatible fabrication. By employing an asymmetric source-drain configuration and grounding the outer ring source, the proposed design effectively reduces junction leakage and enhances radiation coupling efficiency. A photo response is enhanced 535 times as compared to prior devices with the same asymmetry ratio, whereas the intrinsic resistance limit is reduced from 8 to 0.13 μm. TCAD simulations are performed, which validate the analytical model, showing <25% deviation between the predicted and simulated data. Therefore, the SNR-FET demonstrates an improvement in the performance ratio of 98.5%, sensitivity of 97.3%, responsivity of 95.6%, and conversion efficiency of 94.5%, along with an 8.3% reduction in noise equivalent power as compared to the existing models. The results confirm that the proposed SNR-FET allows room temperature, broadband detection capability of up to 0.2 THz and a pathway toward scalable, low-cost next-generation on-chip THz imaging and sensing systems.