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Abstract <p>In this work, a novel Tunnel Field-Effect Transistor (TFET) structure is proposed by integrating a&#xa0;non-uniform step-channel design with a dual-material negative capacitance gate (DM-Ge-Fe-SCDGTFET). The proposed architecture is evaluated against its uniform-channel counterpart (DM-Ge-Fe-DGTFET) to investigate its temperature-dependent performance across a wide range (225 K to 450 K). The numerical simulations are carried out using the TCAD tool. The DM-Ge-Fe-SCDGTFET demonstrates significant improvements in key performance metrics, achieving 64% higher <i>I</i><sub>on</sub>, 54% lower <i>I</i><sub>off</sub>, and 23% enhancement in <i>I</i><sub>on</sub>/<i>I</i><sub>off</sub> ratio compared to the conventional structure. At 450 K, the device exhibits excellent electrostatic control with a threshold voltage of 0.322 V, subthreshold swing of 16.23 mV/dec, and transconductance of 1.84 × 10<sup>–3</sup> mS. Furthermore, a cut-off frequency of 6.09 × 10<sup>12</sup> Hz and transit time of 2.21 × 10<sup>–13</sup> s indicates suitability for high-speed applications. The analysis of higher-order transconductance derivatives confirms a substantial reduction in total harmonic distortion (THD), emphasizing the device’s superior linearity and thermal stability. These findings establish the DM-Ge-Fe-SCDGTFET as a promising candidate for low-power, high-frequency, and thermally robust nanoelectronics applications.</p>

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A Comprehensive Analysis of Linearity and Harmonic Distortion under Thermal Variations in Step-Channel Double Gate TFETs

  • 期刊论文

  • 发表日期：

    2025年9月16日

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  • Vedvrat,
  • Man Mohan Shukla,
  • Rajeev Kumar Sachan

摘要

Abstract

In this work, a novel Tunnel Field-Effect Transistor (TFET) structure is proposed by integrating a non-uniform step-channel design with a dual-material negative capacitance gate (DM-Ge-Fe-SCDGTFET). The proposed architecture is evaluated against its uniform-channel counterpart (DM-Ge-Fe-DGTFET) to investigate its temperature-dependent performance across a wide range (225 K to 450 K). The numerical simulations are carried out using the TCAD tool. The DM-Ge-Fe-SCDGTFET demonstrates significant improvements in key performance metrics, achieving 64% higher Ion, 54% lower Ioff, and 23% enhancement in Ion/Ioff ratio compared to the conventional structure. At 450 K, the device exhibits excellent electrostatic control with a threshold voltage of 0.322 V, subthreshold swing of 16.23 mV/dec, and transconductance of 1.84 × 10–3 mS. Furthermore, a cut-off frequency of 6.09 × 1012 Hz and transit time of 2.21 × 10–13 s indicates suitability for high-speed applications. The analysis of higher-order transconductance derivatives confirms a substantial reduction in total harmonic distortion (THD), emphasizing the device’s superior linearity and thermal stability. These findings establish the DM-Ge-Fe-SCDGTFET as a promising candidate for low-power, high-frequency, and thermally robust nanoelectronics applications.