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Abstract <p>Semiconductor silicon spin qubits (SSQs) represent one of the most promising platforms for scalable quantum computing, owing to their extremely small footprint and full compatibility with existing CMOS fabrication technologies. These qubits are typically realized via gate-defined quantum dots (QDs) in silicon nanowires, with electron or hole spins serving as quantum information carriers. Individual QD states can be capacitively coupled to a high-quality superconducting microresonator, enabling fast, nondestructive, high-fidelity readout of SSQ spin states through dispersive shifts in resonator frequency. In this work, we present modeling and calculation of the quantum capacitance of gate-defined QDs in silicon-on-insulator (SOI) nanowires—a critical parameter for optimizing SSQ device design and performance. We performed realistic 3D geometric modeling of silicon nanowire structures for two types of hole-based SSQs, computing the electric potential distribution, single-particle hole spectrum, and corresponding wave functions. This capacitance model provides a rigorous mapping between the complex many-particle quantum problem in gate-defined QDs and established single-charge tunneling theory, as applied in charge sensing and dispersive readout. A key advance is the use of the unrestricted Hartree–Fock method to solve the many-particle problem directly within the Si nanowire, using a 3D single-particle wave function basis, thereby treating the gate-defined QD as a tunable artificial on-chip atom with controllable electronic structure. Our calculations reveal that the intrinsic quantum capacitance of the gate-defined quantum dot depends nonlinearly on the plunger gate potential and can be approximately described as <i>C</i><sub><i>q</i></sub> ~ 1/|<i>V</i><sub><i>p</i></sub>|<sup>α</sup>, α ~ 1–2. For quantum dots with a suitable number of single-particle energy levels (~10) and a localization size on the order of 30 nm, the intrinsic quantum capacitance is found to be <i>C</i><sub><i>q</i></sub> ~ 30–60 aF and is subject to change about Δ<i>C</i><sub><i>q</i></sub> <InlineEquation ID="IEq1"> <EquationSource Format="TEX">\( \lesssim \)</EquationSource> <!--MicElec2560166Kopchinskii-m1--> </InlineEquation> 10 aF when the QD transits between collective ground state and the nearest excited states which enables their nondestructive readout.</p>

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Predicting Quantum Capacitance of a SOI Nanowire Induced Quantum Dot: On-Chip Quantum Chemistry Approach

  • 期刊论文

  • 发表日期：

    2025年12月1日

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  • I. D. Kopchinskii,
  • V. V. Shorokhov,
  • A. A. Popov,
  • N. A. Shagalov

摘要

Abstract

Semiconductor silicon spin qubits (SSQs) represent one of the most promising platforms for scalable quantum computing, owing to their extremely small footprint and full compatibility with existing CMOS fabrication technologies. These qubits are typically realized via gate-defined quantum dots (QDs) in silicon nanowires, with electron or hole spins serving as quantum information carriers. Individual QD states can be capacitively coupled to a high-quality superconducting microresonator, enabling fast, nondestructive, high-fidelity readout of SSQ spin states through dispersive shifts in resonator frequency. In this work, we present modeling and calculation of the quantum capacitance of gate-defined QDs in silicon-on-insulator (SOI) nanowires—a critical parameter for optimizing SSQ device design and performance. We performed realistic 3D geometric modeling of silicon nanowire structures for two types of hole-based SSQs, computing the electric potential distribution, single-particle hole spectrum, and corresponding wave functions. This capacitance model provides a rigorous mapping between the complex many-particle quantum problem in gate-defined QDs and established single-charge tunneling theory, as applied in charge sensing and dispersive readout. A key advance is the use of the unrestricted Hartree–Fock method to solve the many-particle problem directly within the Si nanowire, using a 3D single-particle wave function basis, thereby treating the gate-defined QD as a tunable artificial on-chip atom with controllable electronic structure. Our calculations reveal that the intrinsic quantum capacitance of the gate-defined quantum dot depends nonlinearly on the plunger gate potential and can be approximately described as Cq ~ 1/|Vp|α, α ~ 1–2. For quantum dots with a suitable number of single-particle energy levels (~10) and a localization size on the order of 30 nm, the intrinsic quantum capacitance is found to be Cq ~ 30–60 aF and is subject to change about ΔCq \( \lesssim \) 10 aF when the QD transits between collective ground state and the nearest excited states which enables their nondestructive readout.